1. Field of the Invention
The present invention relates to a signal adder circuit that adds I and Q signals having a predetermined phase difference therebetween, and in particular, to a signal adder circuit that can add I and Q signals, even when the I and Q signals have a phase error or an amplitude error, by removing effects due to the phase error or the amplitude error.
2. Description of the Related Art
FIG. 3 is a block diagram schematically showing a digital modulation signal receiver having a signal adder circuit according to the related art. The digital modulation signal receiver includes a quadrature demodulator that extracts a quadrature demodulation signal from a signal received after being quadrature-modulated.
As shown in FIG. 3, a signal received through an antenna 1 is input to a band-pass filter 3, amplified by a variable amplifier 4, and input to a quadrature demodulator 5.
The quadrature demodulator 5 includes a local oscillator 6A that generates local oscillation signals L1 and L2 having predetermined frequencies and having a phase difference of 90° therebetween in accordance with a PLL 6B, and mixers 7A and 7B. The mixers 7A and 7B respectively mix the QPSK modulation signal with the local oscillation signals L1 and L2 output from the local oscillator 6A so as to output an I signal and a Q signal (quadrature demodulation signal) which are quadrature in phase.
The I signal and the Q signal passing through the low pass filters 8A and 8B, respectively, are added by an adder 10 and demodulated to a baseband signal by the QPSK demodulator 9 (for example, refer to JP-A-2000-332841).
It is ideal that the I and Q signals have a phase difference of 90° therebetween and an amplitude difference of 0.
However, the phase difference between the I and Q signals is within a range of 90°±5° due to variation of components included in, for example, the local oscillator 6A that oscillates the local oscillation signal or a phase shifter that rotates the phase of the local oscillation signals by 90°. Thus, the phase error of approximately maximum ±5° is included between the I and Q signals. In addition, the amplitude difference between the I and Q signals does not completely become zero. Thus, the amplitude error of approximately ±5% may be included between the I and Q signals.
When the I and Q signals including the phase error or the amplitude error are added by the adder 10, a baseband signal (added signal) after the adding operation has large error, which has an adverse effect on subsequent signal processing.